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rej03d0907-0100 rev.1.00 feb 22, 2008 page 1 of 14 ha1630s07 single cmos high drive operational amplifier rej03d0907-0100 rev.1.00 feb 22, 2008 description ha1630s07 is a low power single cmos operational amplifier featuring high output current with typical current supply of 60 a (2.7 v to 5.5 v). this ic designed to operate from a single power supply and have full swing outputs. available in cmpak-5 and mpak-5 package, the miniature si ze of this ic not only allows compact integration in portable devices but also minimizes distance of signal sources (sensors), thus reducing external noise pick up prior to amplification. this ic exhibit excellent current drive-power ratio capable of 2 k ? load driving and yet resistant to oscillation for capacitive loads up to 200 pf. features ? low supply current i dd = 60 a typ (v dd = 3 v, r l = no load) ? low voltage operation v dd = 2.7 v to 5.5 v ? low input offset voltage v io = 6 mv max ? low input bias current i ib = 1 pa typ ? high output current i osource = 15 ma typ (v dd = 3.0 v, v oh = 2.5 v) i osink = 15 ma typ (v dd = 3.0 v, v ol = 0.5 v) ? input common voltage range includes ground ordering information part no. package name package code HA1630S07CM cmpak-5 ptsp0005zc-a ha1630s07lp mpak-5 plsp0005zb-a
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 2 of 14 pin arrangement v dd v out v in(+) v in(?) 5 4 1 v ss 3 2 ? + (top view) equivalent circuit v dd v ss vbias2 vbias1 vbias3 v in(?) v in(+) v out
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 3 of 14 absolute maximum ratings (ta = 25c) item symbol ratings unit note supply voltage v dd 7.0 v differential input voltage v in(diff) ?v dd to +v dd v 1 input voltage v in ?0.1 to +v dd v output current i out 40 ma 80 (cmpak-5) power dissipation p t 120 (mpak-5) mw 2 operating temperature topr ?40 to +85 c storage temperature tstg ?55 to +125 c note: 1. do not apply input voltage exceeding v dd or 7 v. 2. if ta > 25c, cmpak-5: ?0.8 mw/c mpak-5: ?1.2 mw/c electrical characteristics dc characteristics (ta = 25c, v dd = 3.0 v, v ss = 0 v) item symbol min typ max unit test conditions input offset voltage v io ? ? 6 mv v in = 1.5 v, r l = 1 m ? input bias current i ib ? (1) ? pa v in = 1.5 v input offset current i io ? (1) ? pa v in = 1.5 v common mode input voltage range v cm ?0.1 ? 1.8 v supply current i dd ? 60 170 a v in(+) = 1.0 v, r l = output source current i osource 7.5 15 ? ma v out = 2.5 v output sink current i osink 7.5 15 ? ma v out = 0.5 v open loop voltage gain a v 55 80 ? db r l = 100 k ? common mode rejection ratio cmrr 50 80 ? db v in1 = 0 v, v in2 = 1.8 v power supply rejection ratio psrr 55 80 ? db v dd1 = 2.7 v, v dd2 = 5.5 v output high voltage v oh 2.9 ? ? v r l = 2 k ? to v ss output low voltage v ol ? ? 0.1 v r l = 2 k ? to v dd note: ( ) : design specification ac characteristics (ta = 25c, v dd = 3.0 v, v ss = 0 v) item symbol min typ max unit test conditions srr ? (1) ? slew rate srf ? (1) ? v/ s v in = 1.5 v, c l = 15 pf (v inl = 0.2 v, v inh = 1.7 v) gain bandwidth product gbw ? (1.5) ? mhz v in = 1.5 v, c l = 15 pf note: ( ) : design specification
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 4 of 14 table of graphs electrical characteristics characteristic curves test circuit no. vs. supply voltage 1 1 supply current i dd vs. temperature 2 1 output high voltage v oh vs. rload 3 2 output low voltage v ol vs. rload 4 3 vs. output high voltage 5 4 output source current i osource vs. temperature 6 4 vs. output low voltage 7 5 output sink current i osink vs. temperature 8 5 vs. supply voltage 9 6 vs. input voltage 10 6 input offset voltage v io vs. temperature 11 7 vs. supply voltage 12 8 common mode input voltage range v cm vs. temperature 13 8 common mode rejection ratio cmrr vs. input voltage 14 9 power supply rejection ratio psrr vs. supply voltage 15 10 vs. input voltage 16 11, 12 input bias current i ib vs. temperature 17 11, 12 vs. cload 18 13 vs. temperature 19 13 slew rate (rising) srr time waveform 20 13 vs. cload 21 13 vs. temperature 22 13 slew rate (falling) srf time waveform 23 13 vs. rload 24 14 open loop gain a v vs. frequency 25, 26 14 phase margin pm vs. cload 27 14 noise input voltage vni vs. frequency 28 15
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 5 of 14 test circuits (unless otherwise noted, v dd = 3 v, v ss = 0 v, ta = 25 c) 1. supply current, i dd a ? + 1 v v dd 2. output high voltage, v oh v ? + 1 v r load = 2 k ? v dd 3. output low voltage, v ol 1 v v ? + r load = 2 k ? v dd 4. output source current, i osource ? + 1 v v dd a v out 5. output sink current, i osink ? + v dd a v out 1 v 6. input offset voltage vs. operating voltage v ? + v dd v out 1 k ? 1 k ? v dd /2 1 m ? 1 m ? 7. input offset voltage, v io 1 m ? v ? + 1.5 v v io = v out / 1001 v out 1 k ? 1 k ? 1 m ? ?1.5 v v io = v out / 1001 8. common mode input voltage range, v cm note: v cml and v cmh are values of v in when v io changes more than 50 db taking v in = 0 v as reference. v ? + v dd v out 1 k ? 1 k ? v in 1 m ? 1 m ? 1.5 v v io v in v in = 0 v v cmh v cml
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 6 of 14 test circuits (cont.) (unless otherwise noted, v dd = 3 v, v ss = 0 v, ta = 25 c) 13. slew rate (large signal input) 10. power supply rejection ratio, psrr 11. input bias current, i ib+ 9. common mode rejection ratio, cmrr 1 m ? v ? + 1.5 v v out 1 k ? 1 k ? v in 1 m ? ?1.5 v 1 m ? v ? + v dd /2 v out 1 k ? 1 k ? 1 m ? ?v dd /2 ? + v dd v in a 12. input bias current, i ib? v in ? + v dd a ? + 1.7 v ? 0.2 v v dd v v out 50 ? 15 pf v in v out ? t tr ? v tr srr = ? v tr / ? t tr srf = ? v tf / ? t tf ? v tf ? t tf 10% 90% 90% 10% v in measure point v out1 calculate v io v io1 = v out1 / 1001 cmrr calculation cmrr = 20log 10 |[v io2 ? v io1 ]| 0.3 ? (?1.5 v) ?1.5 v v out2 v io2 = v out2 / 1001 0.3 v v dd measure point v out1 calculate v io v io1 = v out1 / 1001 cmrr calculation psrr = 20log 10 |[v io2 ? v io1 ]| 5.5 v ? 2.7 v 2.7 v v out2 v io2 = v out2 / 1001 5.5 v
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 7 of 14 test circuits (cont.) (unless otherwise noted, v dd = 3 v, v ss = 0 v, ta = 25 c) 15. noise input voltage, vni 14. open loop voltage gain, a v v ? + 1.5 v v out 1 k ? 1 m ? ?1.5 v 50 ? v ? + 1.5 v v out 10 k ? 1 m ? ?1.5 v 10 to 100 mhz ?40 dbm v v in a v = 20log 10 101 |v out | |v in | vni = v out 1001
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 8 of 14 characteristic curves figure 1 ha1630s07 supply current vs. supply voltage figure 3 ha1630s07 output high voltage vs. resistor load 23456 100 1 k 10 k 100 k supply voltage, v dd (v) resistor load, r l ( ? ) output high voltage, v oh (v) figure 2 ha1630s07 supply current vs. ambient temperature 90 20 3.2 3.1 3.0 2.9 2.8 2.7 output source current, i osource (ma) 30 25 20 15 10 5 figure 5 ha1630s07 output high voltage vs. output source current 0 1020304050 output source current, i osource (ma) output high voltage, v oh (v) 6 5 4 3 2 1 0 figure 4 ha1630s07 output low voltage vs. resistor load figure 6 ha1630s07 output source current vs. ambient temperature 100 1 k 10 k 100 k resistor load, r l ( ? ) output low voltage, v ol (v) 0.3 0.2 0.1 0.0 ?0.1 30 40 50 60 70 80 90 20 30 40 50 60 70 80 ?50 ?25 0 25 50 75 100 ambient temperature, ta ( c) ?50 ?25 0 25 50 75 100 ambient temperature, ta ( c) supply current, i dd ( a) supply current, i dd ( a) v dd = 3.0 v v dd = 3.0 v v dd = 5.5 v v dd = 5.5 v v dd = 5.0 v v dd = 3.0 v v dd = 2.7 v v dd = 2.7 v, 3.0 v v dd = 3.0 v
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 9 of 14 characteristic curves (cont.) figure 9 ha1630s07 input offset voltage vs. supply voltage 23456 supply voltage, v dd (v) 6 ?6 ?4 ?2 0 2 4 6 ?6 ?4 ?2 0 2 4 input offset voltage, v io (mv) figure 12 ha1630s07 common mode input voltage vs. supply voltage 23456 supply voltage, v dd (v) 5 ?2 ?1 2 1 0 3 4 common mode input voltage, vcm (v) figure 10 ha1630s07 input offset voltage vs. input voltage ?2.5 ?1.5 ?0.5 0.5 1.5 input voltage, v in (v) 15 ?15 ?10 ?5 0 5 10 input offset voltage, v io (mv) output sink current, i osink (ma) 30 25 20 15 10 5 figure 8 ha1630s07 output sink current vs. ambient temperature ?50 ?25 0 25 50 75 100 ambient temperature, ta ( c) v dd = 3.0 v input offset voltage, v io (mv) figure 11 ha1630s07 input offset voltage vs. ambient temperature ?50 ?25 0 25 50 75 100 ambient temperature, ta ( c) v dd = 2.7 v, 3.0 v, 5.5 v v dd = 1.5 v, v ss = ?1.5 v vcm? common mode input voltage range vcm+ figure 7 ha1630s07 output low voltage vs. output sink current 01020304050 output sink current, i osink (ma) output low voltage, v ol (v) 3 2 1 0 v dd = 5.5 v v dd = 5.0 v v dd = 3.0 v v dd = 2.7 v
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 10 of 14 characteristic curves (cont.) v dd = 3.0 v figure 13 ha1630s07 common mode input voltage vs. ambient temperature ?50?250 255075100 ambient temperature, ta ( c) 3.0 ?1.0 1.0 0.0 2.0 3.0 1.0 0.0 2.0 vcm? common mode input voltage range vcm+ figure 15 ha1630s07 power supply rejection ratio vs. supply voltage 23456 supply voltage, v dd (v) figure 18 ha1630s07 slew rate (rising) vs. capacitive load 0 100 200 300 400 capacitive load, c l (pf) slew rate (rising), srr (v/ s) figure 16 ha1630s07 input bias current vs. input voltage 0123 input voltage, v in (v) 100 ?100 ?50 0 50 100 ?100 ?50 0 50 input bias current, i ib (pa) 120 100 80 60 40 20 0 figure 14 ha1630s07 common mode rejection ratio vs. input voltage ?2 ?1 0 1 input voltage, v in (v) v dd = 1.5 v, v ss = ?1.5 v input bias current, i ib (pa) figure 17 ha1630s07 input bias current vs. ambient temperature ?50 ?25 0 25 50 75 100 ambient temperature, ta ( c) v dd = 3.0 v common mode input voltage, vcm (v) common mode rejection ratio, cmrr (db) 120 100 80 60 40 20 0 power supply rejection ratio, psrr (db) v dd = 3.0 v v dd = 3.0 v
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 11 of 14 characteristic curves (cont.) 120 40 60 0 80 100 20 figure 24 ha1630s07 open loop gain vs. resistor load open loop gain, a v (db) 3.0 0.0 1.0 2.0 figure 21 ha1630s07 slew rate (falling) vs. capacitive load 0 100 200 300 50 150 250 350 400 capacitive load, c l (pf) slew rate (falling), srf (v/ s) slew rate (falling), srf (v/ s) 3.0 1.0 0.0 2.0 figure 19 ha1630s07 slew rate (rising) vs. ambient temperature slew rate (rising), srr (v/ s) figure 22 ha1630s07 slew rate (falling) vs. ambient temperature figure 20 ha1630s07 slew rate (rising) figure 23 ha1630s07 slew rate (falling) ?50 ?25 0 25 50 75 100 ambient temperature, ta ( c) 3.0 1.0 0.0 2.0 ?50 ?25 0 25 50 75 100 ambient temperature, ta ( c) v dd = 3.0 v v dd = 2.7 v, 3.0 v, 5.5 v v dd = 2.7 v, 3.0 v, 5.5 v 100 1 k 10 k 100 k resistor load, r l ( ? ) srr = 1.10 v/ s srf = 1.23 v/ s v dd = 3.0 v
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 12 of 14 characteristic curves (cont.) v dd = 3.0 v r l = 100 k ? figure 25 ha1630s07 open loop gain, phase vs. frequency v dd = 3.0 v c l = 400 pf figure 27 ha1630s07 phase margin vs. capacitive load 0 100 200 300 50 150 250 350 400 capacitive load, c l (pf) 1.0 0.0 0.2 0.4 0.8 0.6 ?100 ?50 100 50 0 ?100 ?50 100 50 0 open loop gain, a v (db) ?90 270 90 0 180 open loop gain, a v (db) phase (deg.) phase (deg.) ?90 270 90 0 180 phase margin, pm (deg.) figure 26 ha1630s07 open loop gain, phase vs. frequency noise input voltage, vni ( v/ hz ) figure 28 ha1630s07 noise input voltage vs. frequency 10 100 1 k 10 k frequency, f (hz) 10 100 1 k 10 k 100 k 1 m 10 m 10 100 1 k 10 k 100 k 1 m 10 m frequency, f (hz) frequency, f (hz) 80 70 60 50 40 30 20 10 0 v dd = 3.0 v v dd = 3.0 v gain phase gain phase
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 13 of 14 package dimensions e a eh e l l 1 q c d b aa pattern of terminal position areas b 2 l 1 e 1 e a 3 l p s a a 2 a 1 a a 1 a 2 b b 1 c c 1 d e e h e l l p x y b 2 e 1 l 1 q 0.8 0 0.8 0.15 0.1 1.8 1.15 1.8 0.3 0.2 0.22 0.25 0.9 0.13 0.11 2.0 1.25 0.65 2.1 1.5 0.25 1.1 0.1 1.0 0.3 0.2 0.15 2.2 1.35 2.4 0.7 l 1 0.1 0.5 0.6 0.05 0.05 0.35 0.9 dimension in millimeters reference symbol min nom max a 3 a s m x s y sc-88a 0.006g mass[typ.] cmpak-5 / cmpak-5v ptsp0005zc-a renesas code jeita package code previous code b a-a section b 1 c 1 c d e a qc aa b xsa a a 2 a 1 m e l h e l 1 l p a 3 ys pattern of terminal position areas s i 1 b 2 e e 1 a a 1 a 2 a 3 b c d e e h e l l 1 l p x y b 2 e 1 i 1 q 1.0 0 1.0 0.35 0.11 2.8 1.5 2.5 0.3 0.1 0.2 min nom dimension in millimeters reference symbol max 1.1 0.25 0.4 0.16 2.95 1.6 0.95 2.8 2.15 0.3 1.4 0.1 1.3 0.5 0.26 3.1 1.8 3.0 0.7 0.5 0.6 0.05 0.05 0.55 0.85 sc-74a 0.015g mass[typ.] mpak-5 / mpak-5v plsp0005zb-a renesas code jeita package code previous code b a-a section c package name mpak-5
ha1630d07 rej03d0907-0100 rev.1.00 feb 22, 2008 page 14 of 14 taping & reel specification package code package ordering unit w p ao ko e f maximum storage no. mpak-5 mpak-5 4 1.5 1.05 3,000 pcs/reel w1 w2 11.4 9 3,000 pcs 8 cmpak-5 11.4 9 8 tape width [taping] [reel] [ordering information] 8 3.3 3.3 1.75 3.5 cmpak-5 4 1.1 1.05 3,000 pcs/reel 8 2.25 2.45 1.75 3.5 bo d1 unit: mm 1.5 4.0 2.0 a b p 0 0 1 d w f e k 0 cover tape tape withdraw direction 13 0.5 178 2 11.4 9.0 4 0.5 120 2.0 0.5 mark indication 1 g 1 g trace code trace code ? mpak-5 ? cmpak-5
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